Micron today announced a 2Gb monolithic LPDDR2 part, which would enable 8Gb packages for smart phones and tablet PCs. Are we really starting to see mobile applications that need this level of performance and DRAM density? How do they make use of it?
There are a lot of designs that need up to 4Gb LPDRAM this year, and we’re also seeing some designs in the tablet PC market that will need up to 8Gb, although the demand for this density is still pretty small. The fundamental drivers for higher density are multimedia applications and OS requirements. We also see a similar movement happening on the processor side with these vendors upgrading their chipsets and expressing a need for higher density LPDRAM, and NAND as well.

Why would they choose LPDDR2 over LPDDR1?
There are several reasons. First, it’s performance. LPDDR2 uses a faster interface and has better bandwidth. Second, LPDDR2 also has a better power profile with low voltage power supplies as well as enhancements to standby operations and Partial-Array Self Refresh modes, which provide further opportunities for additional power reduction. Third, LPDDR2 offers pin count reduction.  Finally, the LPDDR2 standard allows for higher density components without an increase in pin-count.

Why is pin count reduction important?
On the processor side, you are pad-limited. You have the LPDRAM interface, NAND interface, USB interface, Bluetooth, etc. If the LPDRAM uses fewer pins, it lets the processor allocate these pins to other applications. Our LPDDR2 does this by multiplexing—the same pins can handle command and address.

Can you talk a little about why Micron’s LPDDR2 will be valuable to those in the ARM community? What sort of work is Micron doing with ARM?
ARM is the leader of core IP for the handset space, so naturally we work with them to do memory validation. This is an “upstream” effort where we show ARM what we’re intending to do with future memory. It’s good for ARM, because it allows them to develop their IP based on our memory recommendations and simulations. And it’s good for Micron as it provides us with some useful input on where the processor development is going and allows us to fine tune our portfolio to match that. Being validated with ARM also makes it much easier to validate our memory with the actual processors themselves. It’s not a 1:1 transfer of the work, but it does make the integration into customer products much easier.

Tablets have been getting a lot of attention lately. Would these products use LPDDR2 as well? Many netbooks use standard computing architectures—how do you see tablets shifting the mobile computing landscape?
We’re seeing that there will be entrants from two primary directions: shrunk-down Intel-based laptop platforms using mostly DDR2 or DDR3 and scaled up ARM-based handset platforms, which would mostly use LPDDR2. Choices of memories will be dictated by the price point targets, the feature requirements, and sensitivity to power consumption.

You mentioned in the LPDDR2 announcement that you were also developing versions of this technology for value-line handsets. When do you see this being adopted, and what will it mean to users?
Yes, we see LPDDR2 spreading from high-performance applications to gain share throughout the mobile space, crossing over with LPDDR1 at some time in 2012. The reason we think this will get traction is because LPDDR2 can be combined with a new generation of NOR and use a single bus. This means, again, a pin count reduction. In the low end, handset designers are really fighting for pennies of margin wherever they can. A pin count reduction allows the processor to be shrunk, which reduces the cost. These products would be offered in a LPDDR2/NOR multi-chip package, which will enable a more cost-effective system solution.

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How do they do it? Basically, an eight-rank LRDIMM can reduce memory load to a single load per channel (traditional RDIMM loads correspond to the number of ranks; dual-rank=2 loads, quad-rank=4 loads). Lower loads means you can put more DIMMs on a channel (and/or run the modules faster, depending on the configuration), boosting performance and memory density. LRDIMMs are also capable of much higher densities than RDIMMs; we’re making 16GB LRDIMMs today and plan for higher densities in the future.

We’re currently sampling these to buffer suppliers (to make sure our LRDIMMs are as fast and reliable as possible) and a few select server OEMs. You can probably expect to see ultra-high density, high-performance LRDIMM servers hitting the market before mid-year 2010. Want to know more? Visit our LRDIMM home page for full specs.

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DDR3 SODIMM: Small package, big low-power performance

If you design electronics, you’re used to thinking of power savings and performance as opposite poles—you’ve typically had to trade one to get the other. But it really is possible to deliver low power with high performance. In fact, we’ve found ways to continually reduce DRAM power needs while still hitting aggressive performance targets. It’s a strategy we’re calling “performance efficiency.” We see lots of opportunity for our DRAM to make a significant difference in a variety of applications—now and in the years ahead. We can save power and still deliver unprecedented levels of performance.

As a proof point, today Micron announced a new line of high-performance DDR3 SODIMMs that run at just 1.35V (standard DDR3 DIMMs run at 1.5V). That .15V difference may seem miniscule, but it amounts to a significant power savings—our estimates put it at about 20%. But the cool thing is that these SODIMMs aren’t any slower than their power-hungry siblings. They can hit 1333 MT/s in stride—plenty of throughput for the latest generation of high-performance laptops. Check them out: view DDR3 1.35V SODIMMs.

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As data centers continue to multiply at unprecedented levels, the technology community has been looking for ways to make their products more energy efficient – because these are the products that use the power to keep the data centers humming.

A sneak peek inside one of these data centers would reveal thousands or tens of thousands of servers. Servers are similar to PCs in that they use the same microchips—CPUs and memory. Yes, memory, and lots of it. And as EE Times recently put it “the notoriously voracious microprocessor is passing the power-hog mantle to the DRAM,” consuming quite a surprising amount of power – approximately 15%, according to the Burton Group. And for every Watt of power that goes into a piece of IT equipment, it takes another Watt to power and cool it.

Bill Tschudi, program manager at Lawrence Berkley National Laboratory, said that the push to make data centers more energy efficient will include several items including improved IT practices and “advancements on the memory side.”

At Micron, we’ve taken a lead on these memory advancements with our own line of energy-efficient data center memory.

To illustrate how our memory is helping green up data centers, let’s compare standard DDR2 and DDR3 memory to our energy efficient line. Standard DDR2 and DDR3 used in data center servers typically operates at 1.8V and 1.5V, respectively. Through clever changes in the memory architecture, we were able to reduce the operating voltage on DDR2 to 1.5V and on DDR3 to 1.35V. This means that Micron’s 1.5V DDR2 can realize a whopping 58 percent power savings over the standard 1.8V memory modules while the 1.35V DDR3 uses 21 percent less power than its 1.5V predecessor. Over time, these energy efficiencies gained can add up to big cost savings while reducing the impact on Mother Earth; something we can all feel good about.

Our commitment to energy efficient memory doesn’t just stop at data centers. We’ve got some new innovations coming down the pike this week so stay tuned (or follow us using Twitter’s data center) to learn more on how Micron is leading the way in the energy efficient memory movement.

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